\doxysection{RAMECC\+\_\+\+Monitor\+Type\+Def Struct Reference}
\hypertarget{struct_r_a_m_e_c_c___monitor_type_def}{}\label{struct_r_a_m_e_c_c___monitor_type_def}\index{RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}}


RAM\+\_\+\+ECC\+\_\+\+Specific\+\_\+\+Registers.  




{\ttfamily \#include $<$stm32h723xx.\+h$>$}

\doxysubsubsection*{Public Attributes}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_r_a_m_e_c_c___monitor_type_def_a60e78c3b36e9c3d77c9448326a70b291}{CR}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_r_a_m_e_c_c___monitor_type_def_a65365b831054071c8b1d901e96d76298}{SR}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_r_a_m_e_c_c___monitor_type_def_a252ecfa045da1a6744ff6bfdd58f2a83}{FAR}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_r_a_m_e_c_c___monitor_type_def_ac447a55972e03dd2b06e36a3e793c1a3}{FDRL}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_r_a_m_e_c_c___monitor_type_def_a33b4510d82ea2a414696d0617a3b75ae}{FDRH}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_r_a_m_e_c_c___monitor_type_def_a5c17849c6c00a0909e66f10abfe9a67f}{FECR}}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
RAM\+\_\+\+ECC\+\_\+\+Specific\+\_\+\+Registers. 

\label{doc-variable-members}
\Hypertarget{struct_r_a_m_e_c_c___monitor_type_def_doc-variable-members}
\doxysubsection{Member Data Documentation}
\Hypertarget{struct_r_a_m_e_c_c___monitor_type_def_a60e78c3b36e9c3d77c9448326a70b291}\index{RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}!CR@{CR}}
\index{CR@{CR}!RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}}
\doxysubsubsection{\texorpdfstring{CR}{CR}}
{\footnotesize\ttfamily \label{struct_r_a_m_e_c_c___monitor_type_def_a60e78c3b36e9c3d77c9448326a70b291} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t RAMECC\+\_\+\+Monitor\+Type\+Def\+::\+CR}

RAMECC monitor configuration register \Hypertarget{struct_r_a_m_e_c_c___monitor_type_def_a252ecfa045da1a6744ff6bfdd58f2a83}\index{RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}!FAR@{FAR}}
\index{FAR@{FAR}!RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}}
\doxysubsubsection{\texorpdfstring{FAR}{FAR}}
{\footnotesize\ttfamily \label{struct_r_a_m_e_c_c___monitor_type_def_a252ecfa045da1a6744ff6bfdd58f2a83} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t RAMECC\+\_\+\+Monitor\+Type\+Def\+::\+FAR}

RAMECC monitor failing address register \Hypertarget{struct_r_a_m_e_c_c___monitor_type_def_a33b4510d82ea2a414696d0617a3b75ae}\index{RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}!FDRH@{FDRH}}
\index{FDRH@{FDRH}!RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}}
\doxysubsubsection{\texorpdfstring{FDRH}{FDRH}}
{\footnotesize\ttfamily \label{struct_r_a_m_e_c_c___monitor_type_def_a33b4510d82ea2a414696d0617a3b75ae} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t RAMECC\+\_\+\+Monitor\+Type\+Def\+::\+FDRH}

RAMECC monitor failing data high register \Hypertarget{struct_r_a_m_e_c_c___monitor_type_def_ac447a55972e03dd2b06e36a3e793c1a3}\index{RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}!FDRL@{FDRL}}
\index{FDRL@{FDRL}!RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}}
\doxysubsubsection{\texorpdfstring{FDRL}{FDRL}}
{\footnotesize\ttfamily \label{struct_r_a_m_e_c_c___monitor_type_def_ac447a55972e03dd2b06e36a3e793c1a3} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t RAMECC\+\_\+\+Monitor\+Type\+Def\+::\+FDRL}

RAMECC monitor failing data low register \Hypertarget{struct_r_a_m_e_c_c___monitor_type_def_a5c17849c6c00a0909e66f10abfe9a67f}\index{RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}!FECR@{FECR}}
\index{FECR@{FECR}!RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}}
\doxysubsubsection{\texorpdfstring{FECR}{FECR}}
{\footnotesize\ttfamily \label{struct_r_a_m_e_c_c___monitor_type_def_a5c17849c6c00a0909e66f10abfe9a67f} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t RAMECC\+\_\+\+Monitor\+Type\+Def\+::\+FECR}

RAMECC monitor failing ECC error code register \Hypertarget{struct_r_a_m_e_c_c___monitor_type_def_a65365b831054071c8b1d901e96d76298}\index{RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}!SR@{SR}}
\index{SR@{SR}!RAMECC\_MonitorTypeDef@{RAMECC\_MonitorTypeDef}}
\doxysubsubsection{\texorpdfstring{SR}{SR}}
{\footnotesize\ttfamily \label{struct_r_a_m_e_c_c___monitor_type_def_a65365b831054071c8b1d901e96d76298} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t RAMECC\+\_\+\+Monitor\+Type\+Def\+::\+SR}

RAMECC monitor status register 

The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+CMSIS/\+Device/\+ST/\+STM32\+H7xx/\+Include/\mbox{\hyperlink{stm32h723xx_8h}{stm32h723xx.\+h}}\end{DoxyCompactItemize}
